The present invention relates generally to integrated circuits, and more particularly to an integrated circuit system for processing and displaying video and graphics.
Video and graphics systems are typically used in television control electronics, such as set top boxes, integrated digital TVs, and home network computers. Video and graphics systems typically include a display engine that may perform display functions. The display engine is the part of the video and graphics system that receives display pixel data from any combination of locally attached video and graphics input ports, processes the data in some way, and produces final display pixels as output.
This application includes references to both graphics and video, which reflects in certain ways the structure of the hardware itself. This split does not, however, imply the existence of any fundamental difference between graphics and video, and in fact much of the functionality is common to both. Graphics as used herein may include graphics, text and video.
In one embodiment of the present invention, a display engine for processing graphics includes an input for receiving data representing graphics from a memory, and one or more processing elements. The graphics may include multiple graphics layers or windows. The processing elements process two or more graphics layers in parallel to generate blended graphics. The input for receiving data representing graphics and the processing elements may be integrated on an integrated circuit chip. The display engine may also include a graphics controller for receiving two or more graphics layers in parallel, for arranging the graphics layers in an order suitable for parallel processing, and for providing the arranged graphics layers to the one or more processing elements.
In another embodiment of the present invention, a method is provided for blending multiple graphics layers to generate blended graphics. Data representing graphics defining the multiple graphics layers are received, and two or more graphics layers are blended in parallel. Prior to blending, two or more graphics layers may be arranged in an order suitable for parallel processing. The format of the graphics layers may be converted to a common format.
In yet another embodiment of the present invention, a video and graphics system is disclosed including a transport processor, a video decoder, a display engine and a video compositor. The transport processor may receive multiple compressed data streams including video data. The video decoder decodes the video data to generate decoded video data. The display engine receives multiple graphics layers and blend them in parallel to generate blended graphics. The video compositor blends the decoded video data with the blended graphics. The transport processor, the video decoder, the display engine and the video decoder may be integrated on an integrated circuit chip. The compressed data streams may include one or more MPEG Transport streams, which may include SDTV video data and/or HDTV video data.